[PATCH 1/1] Add support for using DRNG random number generator

[Kasatkin, Dmitry]

On Mon, Dec 17, 2012 at 5:06 PM, Jussi Kivilinna
<jussi.kivilinna at mbnet.fi> wrote:
> Quoting Dmitry Kasatkin <dmitry.kasatkin at intel.com>:
>
>> This patch provides support for using Digital Random Number Generator
>> (DRNG)
>> engine, which is available on the latest Intel's CPUs. DRNG engine is
>> accesible via new the RDRAND instruction.
>>
>> This patch adds the following:
>> - support for disabling using of rdrand instruction
>> - checking for RDRAND instruction support using cpuid
>> - RDRAND usage implementation
>>
>> Signed-off-by: Dmitry Kasatkin <dmitry.kasatkin at intel.com>
>> ---
>
> <snip>
>
>>
>> diff --git a/src/hwfeatures.c b/src/hwfeatures.c
>> index 82c435b..e55d9b6 100644
>> --- a/src/hwfeatures.c
>> +++ b/src/hwfeatures.c
>> @@ -134,6 +134,20 @@ detect_x86_64_gnuc (void)
>>       : "%eax", "%ebx", "%ecx", "%edx", "cc"
>>       );
>>  #endif /*#ifdef ENABLE_AESNI_SUPPORT*/
>> +#ifdef ENABLE_DRNG_SUPPORT
>> +   asm volatile
>> +     ("movl $1, %%eax\n\t"           /* Get CPU info and feature flags.
>> */
>> +      "cpuid\n"
>> +      "testl $0x40000000, %%ecx\n\t" /* Test bit 30.  */
>> +      "jz .Lno_rdrand%=\n\t"         /* No RDRAND support.  */
>> +      "orl $512, %0\n"               /* Set our HWF_INTEL_RDRAND bit.  */
>> +
>> +      ".Lno_rdrand%=:\n"
>> +      : "+r" (hw_features)
>> +      :
>> +      : "%eax", "%ecx", "%edx", "cc"
>
>
> %ebx gets modified by cpuid too.
>

Indeed...

But seems not on 32 bit architecture.

>> +      );
>> +#endif /* #ifdef ENABLE_DRNG_SUPPORT */
>>
>>  }
>>  #endif /* __x86_64__ && __GNUC__ */
>> @@ -267,6 +281,22 @@ detect_ia32_gnuc (void)
>>       : "%eax", "%ecx", "%edx", "cc"
>>       );
>>  #endif /*ENABLE_AESNI_SUPPORT*/
>> +#ifdef ENABLE_DRNG_SUPPORT
>> +   asm volatile
>> +     ("pushl %%ebx\n\t"                /* Save GOT register.  */
>> +      "movl $1, %%eax\n\t"           /* Get CPU info and feature flags.
>> */
>> +      "cpuid\n"
>> +      "popl %%ebx\n\t"         /* Restore GOT register. */
>> +      "testl $0x40000000, %%ecx\n\t" /* Test bit 30.  */
>> +      "jz .Lno_rdrand%=\n\t"         /* No RDRAND support.  */
>> +      "orl $512, %0\n"               /* Set our HWF_INTEL_RDRAND bit.  */
>> +
>> +      ".Lno_rdrand%=:\n"
>> +      : "+r" (hw_features)
>> +      :
>> +      : "%eax", "%ecx", "%edx", "cc"
>> +      );
>> +#endif /*ENABLE_DRNG_SUPPORT*/
>>
>>  }
>>  #endif /* __i386__ && SIZEOF_UNSIGNED_LONG == 4 && __GNUC__ */
>> --
>> 1.7.10.4
>>
>>
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>>
>>
>
>
>